This invention relates generally to integrated circuit processes and fabrication, and more particularly, to a multi-level reticle and fabrication method for producing multi-level photoresist patterns.
The demand for progressively smaller and more powerful electronic products, in turn, fuels the need for smaller geometry integrated circuits (ICs), and large substrates. It also creates a demand for a denser packaging of circuits onto IC substrates. The desire for smaller geometry IC circuits requires that the interconnections between components and dielectric layers be as small as possible. Therefore, research continues into reducing the width of via interconnects and connecting lines. Copper is a natural choice to replace aluminum in the effort to reduce the size of lines and vias in an electrical circuit. The conductivity of copper is approximately twice that of aluminum and over three times that of tungsten. As a result, the same current can be carried through a copper line having half the width of an aluminum line.
The electromigration characteristics of copper are also much superior to those of aluminum. Copper is approximately ten times better than aluminum with respect to electromigration. As a result, a copper line, even one having a much smaller cross-section than aluminum line, is able to maintain electrical and mechanical integrity.
There have been problems associated with the use of copper, however, in IC processing. Copper pollutes many of the materials used in IC processes and, therefore, care must be taken to keep copper from migrating. In addition, copper is especially prone to oxidation, especially during oxygen etch processes. Care must be take to protect copper from exposure during etch processes, annealing, and processes requiring elevated temperatures. Also, the oxidation products of copper are difficult to clean. In addition, copper cannot be deposited onto substrates using the conventional processes for the deposition of aluminum when the geometries are small. That is, new deposition processes have been developed for use with copper, instead of aluminum, in the lines and interconnects of an IC interlevel dielectric.
It is impractical to sputter metal, either aluminum or copper to fill small diameter vias, the gap filling capability is poor. To deposit copper, a chemical vapor deposition (CVD) technique has been developed in the industry. However, even with the CVD technique, the convention etch process cannot be used. The low volatility of copper etch products require copper to be removed (vaporized) at high temperatures, approximately 250.degree. C., which is too high for photoresist masks. Wet etches are isotropic, and so too imprecise for many applications. Therefore, the IC processing industry has developed a process to form a via using CVD without etching the copper. The new method is called the inlay, or damascene, process.
The damascene method for forming a via or interconnect between a substrate surface and an overlying dielectric surface is described below. The underlying substrate surface is first completely covered with a dielectric, such as oxide. A patterned photoresist profile is then formed over the oxide. The resist profile has an opening, or hole, in the photoresist corresponding to the area in the oxide where the via is to be formed. Other areas of the oxide to be left in place are covered with photoresist. The photoresist covered dielectric is then etched to remove oxide underlying the hole in the photoresist. The photoresist is then stripped away. CVD copper is then used to fill the via. A layer consisting of oxide with a copper via through it now overlies the substrate surface. The excess copper remaining is removed with a chemical mechanical polish (CMP) process, as is well known in the art.
Since the damascene processing method is relatively new to the IC industry, refinements in the technique are ongoing. One refinement is the dual damascene method. In the dual damascene method vias, interconnects, and lines are formed in a dielectric at two different levels. In terms of the example of the damascene process in the preceding paragraph, the dual damascene process adds a second via, or interconnecting line, in the deposited oxide that extends from the new (oxide) surface to a level in the oxide between the underlying substrate surface and the new (oxide) surface. The dual damascene method is described in greater detail in FIGS. 1-6 as prior art in co-pending patent application Ser. No. 08/665,014 filed Jun. 10, 1996, entitled "Method for Transferring a Multi-level Photoresist Pattern", invented by Tue Nguyen, Sheng Teng Hsu, Jer-shen Maa, and Bruce Dale Ulrich, Docket No. SMT 162 which is assigned to the same assignees as the instant patent.
One known method of performing the dual damascene process is through multiple photoresist mask and etch steps. A single level photoresist profile is formed on a layer deposited dielectric and a via pattern is formed by etching to a first interlevel in the dielectric material. At this point in the process the via is only partially etched. The photoresist is then stripped and a second single layer photoresist profile is formed on the dielectric surface to form an interconnect pattern to a second interlevel in the dielectric material. The interconnect is formed by etching. Coincident with etching the interconnect, the via is etched such that interconnects in underlying substrate layers are exposed to allow electrical contact. Aligning the photoresist profiles is a problem using this method. If the two photoresist profiles are not aligned correctly, then intersecting features in the dielectric material will be misaligned. That is, a conductive line associated with the first photoresist pattern may not correctly intersect a via associated with the second photoresist profile. Alignment errors can be corrected by making the intersecting features oversized, but this takes away from the overall goal of reducing the size of connecting lines and vias. Alignment problems reduce yields, and increase cost and the complexity of IC processes.
Another known method of performing the dual damascene process uses photoresist profiles having multiple levels, or thicknesses, to form vias and interconnect at multiple levels in an IC dielectric. An electron beam or laser may be used to directly write a multi-level pattern into photoresist, but is not commercially practical. So called "gray-tone" masks, formed from repetitive patterns of dots that appear as transparent holes on the chromium mask of the reticle, have also been used to form multi-level resist profiles as described by Pierre Sixt, "Phase Masks and Gray-Tone Masks", Semiconductor FabTech, 1995, page 209. Sixt also gives a general description for a process to transfer the multi-level resist onto a dielectric. The process relies on a one-to-one etch selectivity between the dielectric material and the resist material. The dielectric and the overlying photoresist profile are then etched together so that any exposed dielectric material is etched at the same rate as overlying photoresist material. Thinner layers of resist cause a deeper etch into the dielectric so that, after etching, the dielectric shape generally resembles the photoresist pattern overlying the dielectric at the beginning of the process. One problem with this method is finding dielectric materials and photoresist materials that have identical etch selectivity. It is also difficult to transfer various features, especially small or relatively complicated features, into a dielectric using this method. Polymers and by-products of the etch process tend to collect on areas of the resist pattern, changing the shape and etch rates of the resist profile. Further, the article discloses that vias made by this method have a relatively large size, approximately 25 .mu.m, due to the resolution limits imposed with the pixel size in the gray-tone mask. Vias of this size are approximately two orders of magnitude larger than vias formed through conventional methods, and are unsuited for most IC processes.
It is well known in the art to use a multi-level reticle for the phase shifting of light in the production of photoresist masks. These multi-level, or phase shifting, reticles are used to reduce the constructive, and unintended, interference of light patterns diffracting from a reticle aperture. Constructive interference is the in-phase addition of light from two different sources. The incidence of light, even a highly coherent light, upon an aperture produces at least some diffraction. The pattern of light diffracted through an aperture is dependent upon the aperture shape and wavelength of light as is well known in the art.
A conventional, or bi-level reticle, is composed of a translucent substrate which transmits essentially all incident light, and an opaque substrate which transmits substantially no incident light. Light transmitted through a square aperture bi-level reticle produces the general aperture shape with some diffraction of light around the edges of the aperture shape. One general problem with constructive interference occurs in the area between two vias to be formed on a photoresist mask from light passing through the two corresponding aperture holes in the reticle. Constructive interference of light transmitted through the two via apertures often occurs between the two vias, causing an unintended area of thin resist which ultimately translates into an imperfection in the IC substrate etched from the photoresist mask. This process is explained in greater detail in FIG. 1 in the Detailed Description of the Preferred Embodiment of this invention.
Phase shifting reticles were developed to minimize constructive interference problems, as mentioned above. The general principle of phase shifting reticles is to change the phase of light to promote destructive interference in the areas of the photoresist mask subject to multiple diffraction sources. That is, the light from one diffraction source is adjusted to have a phase difference of 180.degree. from the second diffraction source so that the diffraction effect of the two sources are self canceling.
A typical method of performing this 180.degree. phase shift is to use so called "half tone", or partially transmitting, films. A typical phase shifting reticle, using a half tone film, is disclosed in U.S. Pat. No. 5,358,827 by Garofalo, et al. Other phase shifting multi-level reticles are disclosed by Kobayashi, Oka, Watanabe, Inoue and Sakiyama in "The Control of Sidelobe Intensity of the Chrome Pattern (COSAC) in Half-Tone Phase shifting Mask", Extended Abstracts of the 1995 International Conference on Solid State Devices and Materials, Aug. 21 through 24, 1995, pp. 935-937. Another source describing a similar phase shifting reticle is by Levenson, Viswanathan and Simpson, "Improving Resolution in Photolithography with a Phase shifting Mask", IEEE Transactions on Electron Devices, Vol. ED-29, No. 12, December, 1982.
The above disclosures reveal a reticle constructed of a transparent substrate made of a quartz material to transmit substantially all incident light. The reticle is constructed with a half-tone, or phase shifting film over the substrate to shift the phase of transmitted light. Over the half-tone layer is an opaque film to substantially block transmitted light. Through the use of phase shifting, to produce destructive interference, these reticles produce light at substantially two intensities, 100% intensity and 0% intensity, to form a single-level photoresist mask as is well known in the art. Alternately, it can be said that the reticle produces light at a single intensity (100% transmission), and otherwise blocks (0% transmission) the light. Phase shifting performed with the single level photoresist mask is for the purpose of more clearly defining features, such as vias, and to reduce the effects of diffraction. Typically, conventional half-tone material is chosen with regard to its phase shifting characteristics, as opposed to its light attenuation characteristics. Therefore, the half-tone films in the phase shifting reticles are chosen to phase shift transmitted light 180.degree. while providing substantially no attenuation, as disclosed in the Levenson article. Alternately, half tone films are chosen to phase shift transmitted light 180.degree. while substantially attenuating the intensity of transmitted light as disclosed in Kobayashi, et al.
It would be advantageous to utilize the intensity attenuation characteristics of half-tone films in the production of photoresist masks.
It would also be advantageous to use the intensity attenuation characteristics of half-tone films to make photoresist masks, or patterns, having multi-levels to perform etching into IC substrate material to a plurality of depths.
It would be advantageous to combine the light intensity attenuation characteristics of a half-tone film to create photoresist masks with a plurality of thicknesses, with phase shifting characteristics of a half-tone film to create sharp features and to reduce errors caused by diffraction.
Accordingly, a reticle is provided through which incident light is passed to define predetermined areas of illumination on a light sensitive photoresist surface. The reticle comprises a first transmission level film producing transmitted light of a first intensity, a second transmission level film producing transmitted light of a second intensity greater than the first intensity, and a third transmission level film producing transmitted light of a third intensity greater than the second intensity.
Second transmission level film transmits more than approximately 10%, but less than approximately 90%, of incident light, whereby the attenuation characteristics of the second transmission level film are approximately mid-way between the first and third transmission level film attenuation characteristics, such that the reticle, when directed to a light sensitive surface, forms at least three distinctive intensities on the illuminated areas of photoresist.
A method is also provided for using photolithography to form a reticle on a reticle substrate, to transmit incident light. The method comprises the steps of depositing at least one film, to partially transmit incident light, over the reticle substrate, the partially transmitting film diminishing the intensity of light at predetermined percentage in transmission through the partially transmitting film, and the substrate passing substantially all light incident to the substrate. A method comprises the step of depositing an opaque film over the reticle substrate the opaque film blocking light so that substantially all incident light is attenuated. A method also comprises the step of etching selective portions of the opaque film deposited earlier, and the partially transmitted film deposited earlier, to reveal predetermined areas of reticle substrate and partially transmitting film, whereby light introduced to the reticle is transmitted through the predetermined areas of reticle substrate, partially transmitting film, and remaining opaque film to produce at least three intensities of light.
Further, a method is provided for forming a photoresist profile on a substrate comprising the steps of providing a layer of photoresist having a predetermined thickness on the substrate, and directing light to the photoresist through a reticle having a first transmitting intensity to create a first exposure pattern in the photoresist, and the reticle having a second transmitting intensity to create a second exposure pattern in the photoresist. The method also including the step of developing the photoresist to remove a first thickness of photoresist, less than said predetermined thickness, in the areas of said first exposure pattern, and to remove a second thickness of the photoresist in the areas of the second exposure pattern, whereby the profile includes areas of photoresist having a plurality of different thicknesses.